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CPU design
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21	EN164: Design of Computing Systems Lecture 26: Memory Systems 2 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Add to Reading List Source URL: scale.engin.brown.edu Language: English - Date: 2014-03-23 13:26:56 Computer memory CPU cache Cache Central processing unit
22	Identifying and Predicting Timing-Critical Instructions to Boost Timing Speculation Jing Xin and Russ Joseph Department of EECS Northwestern University Add to Reading List Source URL: users.eecs.northwestern.edu Language: English - Date: 2011-12-14 11:29:00 Computer memory Central processing unit Branch predictor Hazard CPU cache Dynamic random-access memory Dynamic voltage scaling Microarchitecture Design closure Computer hardware Electronic engineering Computer architecture
23	Modeling and Characterizing Power Variability in Multicore Architectures Ke Meng Frank Huebbers Russ Joseph Add to Reading List Source URL: users.eecs.northwestern.edu Language: English - Date: 2008-12-17 09:58:48 Microprocessors Central processing unit Computer architecture Integrated circuits Multi-core processor CPU cache Microarchitecture AMD 10h CPU design Electronic engineering Electronics Computer hardware
24	EN164: Design of Computing Systems Lecture 27: Memory Systems 3 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Add to Reading List Source URL: scale.engin.brown.edu Language: English - Date: 2014-03-23 13:26:54 CPU cache Cache Central processing unit Computer memory
25	Conference September 19 – 21, 2005 Exhibition September 20 – 21, 2005 Worcester, Massachusetts CD-Rom Conference Proceedings Sponsor: Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Semiconductor companies Electronic design automation Signal integrity Agilent Technologies Field-programmable gate array Cadence Design Systems Intel CPU design Xilinx Electronic engineering Computing Electronics
26	EN164: Design of Computing Systems Lecture 28: Memory Systems 4 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Add to Reading List Source URL: scale.engin.brown.edu Language: English - Date: 2014-03-23 13:26:55 Central processing unit Memory management CPU cache Write buffer Computer memory Cache Computer hardware
27	EN164: Design of Computing Systems Lecture 34: Misc – Multi-cores and Multi-processors Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Add to Reading List Source URL: scale.engin.brown.edu Language: English - Date: 2014-03-23 13:26:52 Computer memory Parallel computing CPU cache Cache Central processing unit Multi-core processor False sharing MESI protocol Snoopy Cache Computing Cache coherency Computer hardware
28	1702 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 18, NO. 12, DECEMBER 1999 Power Optimization of Variable-Voltage Core-Based Systems Add to Reading List Source URL: www.cs.berkeley.edu Language: English - Date: 2003-06-11 14:31:52 CPU cache Cache Central processing unit Computer memory Multi-core processor Intel Core Parallel computing Power supply Scheduling Electronic engineering Computing Electronics
29	FEATURE OPENCORES: DIY CPUS Designing and implementing your own CPU or System-on-Chip brings benefits to thousands of researchers and forward-looking businesses, and is being adopted by a growing number of hobbyists. Ri Add to Reading List Source URL: www.linuxvoice.com Language: English - Date: 2015-02-09 09:27:26 Electronic design Embedded microprocessors OpenRISC Microprocessors Logic design OpenCores LEON Field-programmable gate array OpenSPARC Electronic engineering Computer hardware Electronics
30	Reactive-Associative Caches Brannon Batson Alpha Design Group Compaq Computer Corporation Add to Reading List Source URL: research.ac.upc.edu Language: English - Date: 2002-03-20 08:47:53 Computing Central processing unit Computer architecture CPU cache R8000 AMD 10h Branch predictor Hash table Locality of reference Computer hardware Computer memory Cache

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